The LMK03328 device is an ultra-low-noise clock generator that has two fractional-N frequency synthesizers with integrated VCOs, flexible clock distribution and fan-out, and pin-selectable configuration states stored in an on-chip EEPROM. The device can generate multiple clocks for various multi-gigabit serial interfaces and digital devices, which can reduce the BOM cost and board area, and can improve reliability by replacing multiple oscillators and clock distribution devices. The ultra-low-jitter reduces bit error rate (BER) in high-speed serial links.
- Ultra Low Noise, High Performance
- Jitter: 100-fs RMS Typical, FOUT > 100 MHz
- PSNR: –80 dBc, Robust Supply Noise Immunity
- Flexible Device Options
- Up to 8 AC-LVPECL, AC-LVDS, AC-CML, HCSL or LVCMOS Outputs, or Any Combination
- Pin Mode, I2C Mode, and EEPROM Mode
- 71-Pin Selectable Pre-Programmed Default Start-Up Options
- Dual Inputs With Automatic or Manual Selection
- Crystal Input: 10 to 52 MHz
- External Input: 1 to 300 MHz
- Frequency Margining Options
- Fine Frequency Margining (±50 ppm Typical) Using Low-Cost Pullable Crystal Reference
- Glitchless Coarse Frequency Margining (%) Using Output Dividers
- Other Features
- Supply: 3.3-V Core, 1.8-V, 2.5-V, 3.3-V Output Supply
- Industrial Temperature Range (–40ºC to +85ºC)
- Package: 7-mm × 7-mm 48-WQFN